Semiconductor Engineering

Scan Pattern Portability From PSV To ATE To SLT To IST

Chip testing has become increasingly complex due to the number of variables impacting designs – from design size and complexity, to high transistor counts on advanced technology nodes, to 2.5D/3D ...
EDN

Invoys enters ATE market, taps Mentor to lower test costs

PLEASANTON, Calif. — In what could finally lower chip-testing costs, Inovys Corp. here entered the automatic test equipment (ATE) business, announcing its initial and long-awaited tester for system-on ...
Electronic Design

Protecting AI chips from thermal challenges during ATE test

As the industry realizes the impact that artificial intelligence (AI) can have on a wide range of applications, many companies are seeking to develop AI chips that will speed up the processing of ...
Semiconductor Engineering

Supporting Multiple Time Domains In SoC Production Test

Complex system-on-chip (SoC) devices make every stage of the development flow harder, and the challenges continue even after the silicon is fabricated. Automatic test equipment (ATE) screening for ...
EDN

ATE PCBs Demand Quick Turn and High Quality

A few years ago, the semiconductor lingo for automated test equipment (ATE) PCBs was “load boards.” But more recently, they’ve become increasingly known in semiconductor parlance as “device interface ...