Semiconductor Engineering

Are You Paying Proper Attention To Your ESD Design Windows?

Electrostatic discharge (ESD) issues in integrated circuit (IC) chip designs have become more critical at advanced semiconductor process nodes, due to shrinking transistor dimensions and oxide layer ...
Semiconductor Engineering

ESD Co-Design For High-Speed SerDeS In FinFET Technologies

An electronic device is susceptible to Electrostatic Discharge (ESD) damage during its entire life cycle, including the phase from the completion of the silicon wafer processing to when the device ...
EDN

Tyco intros ESD and Overcurrent reference layout for HDMI 1.3 interfaces

Tyco Electronics has announced the introduction of a reference layout for ESD and overcurrent protection for HDMI 1.3 interfaces. The reference layout utilizes Tyco Electronics' low-capacitance ...
Design-Reuse

Apache Introduces PathFinder, the Industry's First Full-chip ESD Physical Integrity Solution

San Jose, Calif. – May 10, 2010 – Apache Design Solutions, the technology leader in power integrity and noise closure for chip-package-systems (CPS) convergence, today announced PathFinder™, a ...
EDN

EMC and System-ESD Design Guidelines for Board Layout

The topic of ElectroMagnetic Compatibility (EMC) is important for the functionality and security of electronic devices. Today’s designers have to deal with permanently increasing system frequencies, ...
Electronic Design

Escalating ESD Protection Demands Inspire Innovative Architecture Strategies

Fig 1. Comparison of a traditional ESD protection design methodology and the PicoGuard XS architecture shows how the latter can provide matched inductance. Fig 2. In a traditional ESD device, the ...